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d a t a sh eet product speci?cation supersedes data of 2000 dec 12 file under integrated circuits, ic24 2001 apr 06 integrated circuits 74LVC1GU04 inverter
2001 apr 06 2 philips semiconductors product speci?cation inverter 74LVC1GU04 features wide supply voltage range from 1.65 to 5.5 v high noise immunity complies with jedec standard: C jesd8-7 (1.65 to 1.95 v) C jesd8-5 (2.3 to 2.7 v) C jesd8b/jesd36 (2.7 to 3.6 v). 24 ma output drive (v cc = 3.0 v) cmos low power consumption latch-up performance exceeds 250 ma input accepts voltages up to 5 v sot353 package. description the 74LVC1GU04 is a high-performance, low-power, low-voltage, si-gate cmos device, superior to most advanced cmos compatible ttl families. the input can be driven from either 3.3 or 5 v devices. this feature allows the use of this device in a mixed 3.3 and 5 v environment. the 74LVC1GU04 provides the inverting single state unbuffered function. quick reference data ground = 0 v; t amb =25 c; t r =t f 2.5 ns. notes 1. c pd is used to determine the dynamic power dissipation (p d in m w). p d =c pd v cc 2 f i +(c l v cc 2 f o ) where: f i = input frequency in mhz; f o = output frequency in mhz; c l = output load capacitance in pf; v cc = supply voltage in volts. 2. the condition is v i = gnd to v cc . function table see note 1. note 1. h = high voltage level; l = low voltage level. symbol parameter conditions typical unit t phl /t plh propagation delay a to y v cc = 1.8 v; c l = 30 pf; r l =1k w 1.7 ns v cc = 2.5 v; c l = 30 pf; r l = 500 w 1.3 ns v cc = 3.3 v; c l = 50 pf; r l = 500 w 1.6 ns v cc = 5.0 v; c l = 50 pf; r l = 500 w 1.3 ns c i input capacitance 6 pf c pd power dissipation capacitance per buffer notes 1 and 2 14.9 pf input output ay lh hl
2001 apr 06 3 philips semiconductors product speci?cation inverter 74LVC1GU04 ordering information pinning type number package temperature range pins package material code marking 74LVC1GU04gw - 40 to +85 c 5 sc-88a plastic sot353 vd pin symbol description 1 n.c. not connected 2 a data input a 3 gnd ground (0 v) 4 y data output y 5v cc supply voltage handbook, halfpage 1 2 3 5 4 mna042 u04 v cc a y gnd n.c. fig.1 pin configuration. handbook, halfpage mna108 ay 2 4 fig.2 logic symbol. handbook, halfpage mna109 4 1 2 fig.3 iee/iec logic symbol. handbook, halfpage mna636 a y 100 w v cc v cc fig.4 logic diagram.
2001 apr 06 4 philips semiconductors product speci?cation inverter 74LVC1GU04 recommended operating conditions limiting values in accordance with the absolute maximum rating system (iec 60134); voltages are referenced to gnd (ground = 0 v). notes 1. the input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. above 55 c the value of p d derates linearly with 2.5 mw/k. symbol parameter conditions min. max. unit v cc supply voltage 1.65 5.5 v v i input voltage 0 5.5 v v o output voltage 0 v cc v t amb operating ambient temperature - 40 +85 c t r , t f input rise and fall times v cc = 1.65 to 2.7 v 0 20 ns/v v cc = 2.7 to 5.5 v 0 10 ns/v symbol parameter conditions min. max. unit v cc supply voltage - 0.5 +6.5 v i ik input diode current v i <0 -- 50 ma v i input voltage note 1 - 0.5 +6.5 v i ok output diode current v o >v cc or v o <0 - 50 ma v o output voltage note 1 - 0.5 v cc + 0.5 v i o output source or sink current v o =0tov cc - 50 ma i cc , i gnd v cc or gnd current - 100 ma t stg storage temperature - 65 +150 c p d power dissipation per package for temperature range from - 40 to +85 c; note 2 - 200 mw
2001 apr 06 5 philips semiconductors product speci?cation inverter 74LVC1GU04 dc characteristics at recommended operating conditions; voltage are referenced to gnd (groun d=0v). note 1. all typical values are measured at v cc = 3.3 v and t amb =25 c. symbol parameter test conditions t amb ( c) unit other v cc (v) - 40 to +85 min. typ. (1) max. v ih high-level input voltage 1.65 to 5.5 0.75 v cc -- v v il low-level input voltage 1.65 to 5.5 -- 0.25 v cc v v ol low-level output voltage v i =v ih or v il ; i o = 100 m a 1.65 to 5.5 -- 0.1 v v i =v ih or v il ; i o = 4 ma 1.65 -- 0.45 v v i =v ih or v il ; i o = 8 ma 2.3 -- 0.3 v v i =v ih or v il ; i o = 12 ma 2.7 -- 0.4 v v i =v ih or v il ; i o = 24 ma 3.0 -- 0.55 v v i =v ih or v il ; i o = 32 ma 4.5 -- 0.55 v v oh high-level output voltage v i =v ih or v il ; i o = - 100 m a 1.65 to 5.5 v cc - 0.1 -- v v i =v ih or v il ; i o = - 4 ma 1.65 1.2 -- v v i =v ih or v il ; i o = - 8 ma 2.3 1.9 -- v v i =v ih or v il ; i o = - 12 ma 2.7 2.2 -- v v i =v ih or v il ; i o = - 24 ma 3.0 2.3 -- v v i =v ih or v il ; i o = - 32 ma 4.5 3.8 -- v i li input leakage current v i = 5.5 v or gnd 3.6 - 0.1 5 m a i cc quiescent supply current v i =v cc or gnd; i o = 0 5.5 - 0.1 10 m a
2001 apr 06 6 philips semiconductors product speci?cation inverter 74LVC1GU04 ac characteristics gnd = 0 v; t r =t f 2.0 ns. ac waveforms symbol parameter test conditions t amb ( c) unit waveforms v cc (v) - 40 to +85 min. typ. max. t phl /t plh propagation delay a to y see figs 5 and 8 1.65 to 1.95 0.3 1.7 5.0 ns 2.3 to 2.7 0.3 1.3 4.0 ns 2.7 0.5 1.7 5.0 ns 3.0 to 3.6 0.5 1.6 3.7 ns 4.5 to 5.5 0.5 1.3 3.0 ns handbook, halfpage mna637 t phl t plh v m v m a input y output gnd v i v oh v ol fig.5 input a to output y propagation delay times. v cc v m input v i t r =t f 1.65 to 1.95 v 0.5 v cc v cc 2.0 ns 2.3 to 2.7 v 0.5 v cc v cc 2.0 ns 2.7 v 1.5 v 2.7 v 2.5 ns 3.0 to 3.6 v 1.5 v 2.7 v 2.5 ns 4.5 to 5.5 v 0.5 v cc v cc 2.5 ns v ol and v oh are typical output voltage drop that occur with the output load.
2001 apr 06 7 philips semiconductors product speci?cation inverter 74LVC1GU04 handbook, halfpage mna638 v cc r bias = 560 k w input 0.47 m f 100 m f output a i o v i fig.6 test set-up for measuring forward transconductance. f i = 1 khz. v o is constant. g fs d i o d v i -------- - = handbook, halfpage 0246 120 100 40 0 80 20 60 mna639 v cc (v) g fs (ma/v) fig.7 typical forward transconductance as a function of supply voltage. t amb =25 c. handbook, full pagewidth v ext v cc v i v o mna616 d.u.t. c l r t r l r l pulse generator fig.8 load circuitry for switching times. v cc v i c l r l v ext t plh /t phl t pzh /t phz t pzl /t plz 1.65 to 1.95 v v cc 30 pf 1 k w open gnd 2 v cc 2.3 to 2.7 v v cc 30 pf 500 w open gnd 2 v cc 2.7 v 2.7 v 50 pf 500 w open gnd 6 v 3.0 to 3.6 v 2.7 v 50 pf 500 w open gnd 6 v 4.5 to 5.5 v v cc 50 pf 500 w open gnd 2 v cc definitions for test circuit: r l = load resistor. c l = load capacitance including jig and probe capacitance (see chapter ac characteristics). r t = termination resistance should be equal to the output impedance z o of the pulse generator.
2001 apr 06 8 philips semiconductors product speci?cation inverter 74LVC1GU04 application information some applications for the 74LVC1GU04 are: linear amplifier (see fig.9) crystal oscillator (see fig.10). remark to the application information. all values given are typical values unless otherwise specified. handbook, halfpage u04 r1 r2 v cc z l mna052 1 m f fig.9 used as a linear amplifier. z l >10k w , r1 3 3k w and r2 1m w . open loop amplification: a ol = 20 (typical value). voltage amplification: maximum output voltage: unity gain bandwidth product: b = 5 mhz (typical value). a u a ol 1 r1 r2 ------- - 1a ol ) + ( + -------------------------------------------- C = v o(p-p) v cc 1.5 v centered at 0.5v cc C ? fig.10 crystal oscillator configuration. c1 = 47 pf (typical). c2 = 22 pf (typical). r1 = 1 to 10 m w (typical). r2 optimum value depends on the frequency and required stability against changes in v cc or average minimum i cc (i cc = 2 ma (typical) at v cc = 3.3 v and f = 10 mhz). handbook, halfpage mna053 u04 out r2 r1 c1 c2
2001 apr 06 9 philips semiconductors product speci?cation inverter 74LVC1GU04 package outline references outline version european projection issue date iec jedec eiaj sot353 wb m b p d e 1 e a a 1 l p q detail x h e e v m a a b y 0 1 2 mm scale c x 13 2 4 5 plastic surface mounted package; 5 leads sot353 unit a 1 max b p cd e (2) e 1 h e l p qy w v mm 0.1 0.30 0.20 2.2 1.8 0.25 0.10 1.35 1.15 0.65 e 1.3 2.2 2.0 0.2 0.1 0.2 dimensions (mm are the original dimensions) 0.45 0.15 0.25 0.15 a 1.1 0.8 97-02-28 sc-88a
2001 apr 06 10 philips semiconductors product speci?cation inverter 74LVC1GU04 soldering introduction to soldering surface mount packages this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our data handbook ic26; integrated circuit packages (document order number 9398 652 90011). there is no soldering method that is ideal for all surface mount ic packages. wave soldering can still be used for certain surface mount ics, but it is not suitable for fine pitch smds. in these situations reflow soldering is recommended. re?ow soldering reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. typical reflow peak temperatures range from 215 to 250 c. the top-surface temperature of the packages should preferable be kept below 220 c for thick/large packages, and below 235 c for small/thin packages. wave soldering conventional single wave soldering is not recommended for surface mount devices (smds) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. to overcome these problems the double-wave soldering method was specifically developed. if wave soldering is used the following conditions must be observed for optimal results: use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. for packages with leads on two sides and a pitch (e): C larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; C smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves at the downstream end. for packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves downstream and at the side corners. during placement and before soldering, the package must be fixed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. typical dwell time is 4 seconds at 250 c. a mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. manual soldering fix the component by first soldering two diagonally-opposite end leads. use a low voltage (24 v or less) soldering iron applied to the flat part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 c.
2001 apr 06 11 philips semiconductors product speci?cation inverter 74LVC1GU04 suitability of surface mount ic packages for wave and re?ow soldering methods notes 1. all surface mount (smd) packages are moisture sensitive. depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). for details, refer to the drypack information in the data handbook ic26; integrated circuit packages; section: packing methods . 2. these packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. if wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. the package footprint must incorporate solder thieves downstream and at the side corners. 4. wave soldering is only suitable for lqfp, tqfp and qfp packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. wave soldering is only suitable for ssop and tssop packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. package soldering method wave reflow (1) bga, lfbga, sqfp, tfbga not suitable suitable hbcc, hlqfp, hsqfp, hsop, htqfp, htssop, sms not suitable (2) suitable plcc (3) , so, soj suitable suitable lqfp, qfp, tqfp not recommended (3)(4) suitable ssop, tssop, vso not recommended (5) suitable
2001 apr 06 12 philips semiconductors product speci?cation inverter 74LVC1GU04 data sheet status notes 1. please consult the most recently issued data sheet before initiating or completing a design. 2. the product status of the device(s) described in this data sheet may have changed since this data sheet was published. the latest information is available on the internet at url http://www.semiconductors.philips.com. data sheet status (1) product status (2) definitions objective data development this data sheet contains data from the objective specification for product development. philips semiconductors reserves the right to change the speci?cation in any manner without notice. preliminary data quali?cation this data sheet contains data from the preliminary specification. supplementary data will be published at a later date. philips semiconductors reserves the right to change the speci?cation without notice, in order to improve the design and supply the best possible product. product data production this data sheet contains data from the product specification. philips semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. changes will be communicated according to the customer product/process change noti?cation (cpcn) procedure snw-sq-650a. definitions short-form specification ? the data in a short-form specification is extracted from a full data sheet with the same type number and title. for detailed information see the relevant data sheet or data handbook. limiting values definition ? limiting values given are in accordance with the absolute maximum rating system (iec 60134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the specification is not implied. exposure to limiting values for extended periods may affect device reliability. application information ? applications that are described herein for any of these products are for illustrative purposes only. philips semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. disclaimers life support applications ? these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips semiconductors for any damages resulting from such application. right to make changes ? philips semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. philips semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
2001 apr 06 13 philips semiconductors product speci?cation inverter 74LVC1GU04 notes
2001 apr 06 14 philips semiconductors product speci?cation inverter 74LVC1GU04 notes
2001 apr 06 15 philips semiconductors product speci?cation inverter 74LVC1GU04 notes
? philips electronics n.v. sca all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owne r. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not con vey nor imply any license under patent- or other industrial or intellectual property rights. internet: http://www.semiconductors.philips.com 2001 72 philips semiconductors C a worldwide company for all other countries apply to: philips semiconductors, marketing communications, building be-p, p.o. box 218, 5600 md eindhoven, the netherlands, fax. +31 40 27 24825 argentina: see south america australia: 3 figtree drive, homebush, nsw 2140, tel. +61 2 9704 8141, fax. +61 2 9704 8139 austria: computerstr. 6, a-1101 wien, p.o. box 213, tel. +43 1 60 101 1248, fax. +43 1 60 101 1210 belarus: hotel minsk business center, bld. 3, r. 1211, volodarski str. 6, 220050 minsk, tel. +375 172 20 0733, fax. +375 172 20 0773 belgium: see the netherlands brazil: see south america bulgaria: philips bulgaria ltd., energoproject, 15th floor, 51 james bourchier blvd., 1407 sofia, tel. +359 2 68 9211, fax. +359 2 68 9102 canada: philips semiconductors/components, tel. +1 800 234 7381, fax. +1 800 943 0087 china/hong kong: 501 hong kong industrial technology centre, 72 tat chee avenue, kowloon tong, hong kong, tel. +852 2319 7888, fax. +852 2319 7700 colombia: see south america czech republic: see austria denmark: sydhavnsgade 23, 1780 copenhagen v, tel. +45 33 29 3333, fax. +45 33 29 3905 finland: sinikalliontie 3, fin-02630 espoo, tel. +358 9 615 800, fax. +358 9 6158 0920 france: 7 - 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